A conventional DVD-R/RW and DVD+RW/+R recorder is constituted as shown in FIG. 6. This apparatus is provided with both of a 186-multiply wobble PLL circuit and a 32-multiply wobble PLL circuit. Usually, address information, additional information, and a sync signal are recorded on these types of recording media to specify recording positions (tracks) on optical discs even when no data are recorded on the optical discs. As a method for modulating the above-mentioned address information and additional information, a format called “Land Pre-pit” (hereinafter also referred to as “LPP”) is employed for the DVD-R/RW while a format called “Address In Pre-groove” (hereinafter also referred to as “ADIP”) is employed for the DVD+RW/+R.
In the figure, reference numeral 601 denotes a wobble signal, which is input to a time domain filter 602 for noise removal. The signal from which noise is removed by the time domain filter 602 is input to a subsequent wobble period averaging circuit 603, wherein variations in the cycle of the signal are averaged.
A phase correction circuit 614 performs phase compensation by correcting a timing error in the recorded data with respect to the ADIP signal, which timing error is caused by the cycle of the ADIP signal being converted, and either the LPP signal or the ADIP signal outputted through a timing conversion circuit 616 is selected by a selector 615 to be input to the phase compensation circuit 614.
A phase comparator 604 compares the phase of the output from the wobble period averaging circuit 603 with the phase of the output from a selector 612. Reference numeral 605 denotes a charge pump for digital-to-analog converting the output of the phase comparator 604 in order to control a VCO (Voltage-Controlled Oscillator) which is a subsequent analog circuit. Reference numeral 606 denotes a selector for supplying the output of the charge pump 605 to either of a VCO (Voltage-Controlled Oscillator) 607 or a VCO 608.
Reference numeral 609 denotes a selector for selecting either the output of the VOC 607 or the output of the VOC 608, and supplying the selected signal to an arithmetic circuit 613 described later, 610 denotes a 1/186 frequency divider, 611 denotes a 1/32 frequency divider, and 612 denotes a selector for selecting either the output of the 1/186 frequency divider 610 or the output of the 1/32 frequency divider 611, and outputting the selected signal. Further, reference numeral 613 denotes an arithmetic circuit for performing frequency-division of a reference clock, detection of PLL lock/unlock, detection of frequency error, detection of phase inversion, and the like.
Further, reference numeral 617 denotes an LPP decoder for decoding a binarized LPP signal to output address data, and 618 denotes an ADIP decoder for decoding a binarized ADIP signal to output address data. Further, reference numeral 691 denotes a selector for selecting either the output of the LPP decoder 617 or the output of the ADIP decoder 618, and outputting the selected signal as address data.
In the above-mentioned construction, when the input signal is a land pre-pit signal based on the DVD-R/RW, the selector 606 outputs the input signal to the VCO (607), and the output of the 1/186 frequency-divider 610 is selected by the selector 612 to be output to the phase comparator 604, and further, a deviation from the reference clock is calculated by the arithmetic circuit 613, thereby outputting a signal WPLLOK 615 indicating that the PLL circuit is locked, and a recording clock frequency OK signal WREFOK 616.
As described above, there is a multi-optical-disc-compatible recorder which can perform recording and playback in/from the above-mentioned plural optical discs by providing a means for converting address information that is detected from the binarized wobble signal based on the DVD+RW/+R standard into a land pre-pit signal based on the DVD-R/RW standard (for example, refer to Japanese Published Patent Application No. 2003-100015 and Japanese Published Patent Application No. 2003-123257). This apparatus detects the address information from the binarized wobble signal, and converts the address information which also concerns the cycle of the binarized wobble signal into a land pre-pit signal based on the DVD-R/RW standard, thereby realizing cycle protection between the two sync signals to avoid destruction of the recorded data due to recording of data into a wrong position on the disc.
The recording clock generation apparatus of the conventional DVD-R/RW and DVD+RW/+R recorder is constructed as described above, and contains the PLL circuits corresponding to the formats of the DVD-R/RW standard and the DVD+RW/+R standard, respectively. Therefore, the circuit scale of the apparatus is undesirably increased, which is disadvantageous in terms of cost.
Further, the means for converting the binarized wobble signal based on the DVD+RW/+R standard into the land pre-pit signal based on the DVD-R/RW standard, which is aimed at sync protection, complicates the structure of the conversion circuit.
The present invention is made to solve the above-mentioned problems and has for its object to provide a recording clock generation apparatus to be used in a DVD-R/RW and DVD+RW/+R recorder, which is compatible to the respective formats of the DVD-R/RW standard and the DVD+RW/+R standard, and avoids an increase in the circuit scale.